TI-99/4A Card Slot

From HwB

Available at Texas Instruments TI-99/4A computers.

Pinout

60 PIN UNKNOWN CONNECTOR on the computer 

        59     Left     1
Front ===================== Rear
        60     Right    2
Pin Name Dir Description
1 +8V Arrow.png +5V 3-T regulator voltage supply (about +8V)
2 +8V Arrow.png +5V 3-T regulator voltage supply (about +8V)
3 GND Arrow.png Ground
4 READYA System ready (10K pull-up to +5V)
5 GND Arrow.png Ground
6 RESET* Arrowr.png System reset (active low)
7 GND Arrow.png Ground
8 SCLK nc System clock (not connected)
9 LCP* nc CPU indicator 1=TI99 0=2nd generation (not connected)
10 AUDIO Arrowl.png Input audio (=AUDIOIN)
11 RDBENA* Arrowl.png Active low: enable flex cable data bus drivers (1K pull-up)
12 PCBEN H PCB enable for burn-in (always High)
13 HOLD* H Active low CPU hold request (always High)
14 IAQHA nc IAQ [or] HOLDA (logical or)
15 SENILA* H Interrupt level A sense enable (always High)
16 SENILB* H Interrupt level B sense enable (always High)
17 INTA* Arrowl.png Active low interrupt level A (=EXTINT*)
18 LOAD* nc Unmaskable interrupt (not connected)
19 D7 Arrowlr.png Data bit 7 (LSB)
20 GND Arrow.png Ground
21 D5 Arrowlr.png Data bit 5
22 D6 Arrowlr.png Data bit 6
23 D3 Arrowlr.png Data bit 3
24 D4 Arrowlr.png Data bit 4
25 D1 Arrowlr.png Data bit 1
26 D2 Arrowlr.png Data bit 2
27 GND Arrow.png Ground
28 D0 Arrowlr.png Data bit 0 (MSB)
29 A14 Arrowr.png Address bit 14
30 A15 Arrowr.png Address bit 15 (LSB). Also CRU output bit.
31 A12 Arrowr.png Address bit 12
32 A13 Arrowr.png Address bit 13
33 A10 Arrowr.png Address bit 10
34 A11 Arrowr.png Address bit 11
35 A8 Arrowr.png Address bit 8
36 A9 Arrowr.png Address bit 9
37 A6 Arrowr.png Address bit 6
38 A7 Arrowr.png Address bit 7
39 A4 Arrowr.png Address bit 4
40 A5 Arrowr.png Address bit 5
41 A2 Arrowr.png Address bit 2
42 A3 Arrowr.png Address bit 3
43 A0 Arrowr.png Address bit 0 (MSB)
44 A1 Arrowr.png Address bit 1
45 AMB H Extra address bit. Always High.
46 AMA H Extra address bit. Always High.
47 GND Arrow.png Ground
48 AMC H Extra address bit. Always High.
49 GND Arrow.png Ground
50 CLKOUT* Arrowr.png Inversion of phase 3 clock (=PHI3*)
51 CRUCLK* Arrowr.png Inversion of TMS9900 CRUCLOCK pin
52 DBIN Arrowr.png Active high = read memory
53 GND Arrow.png Ground
54 WE* Arrowr.png Write Enable (derived from TMS9900 WE* pin)
55 CRUIN Arrowl.png CRU input bit to TMS9900
56 MEMEN* Arrowr.png Memory access enable (active low)
57 -12V Arrow.png -12 Volts 3-T regulator supply voltage (about -16V)
58 -12V Arrow.png -12 Volts 3-T regulator supply voltage (about -16V)
59 +12V Arrow.png +12 Volts 3-T regulator supply voltage (about +16V)
60 +12V Arrow.png +12 Volts 3-T regulator supply voltage (about +16V)

Direction is computer relative world.

Notes:

  • Signals buffered by 74LS244 in connection card: A0-A15, DBIN, MEMEN*, WE*, CLRCLK*, RESET*, CLKOUT.
  • Unbuffered signals: CRUIN, INTA*, AUDIOIN, READY
  • Data bus is buffered by two 74LS245 (one at each end of the cable),driven by RDBENA (direction set by DBIN).
  • All signals must be re-buffered on each card.
  • Always High lines (AMA, AMB, AMC, SENILA*, SENILB*, PCBEN, HOLD*) are pulled up to +5 Volts by 47 Ohms resistors.

Contributions

Sources

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